Back to search

Electrical Engineering

异步堆叠架构

Asynchronous Stacking Architecture

A circuit design architecture that decouples holding and trigger voltages in high-voltage ICs using asynchronous stacking techniques to improve ESD protection performance. / 一种利用异步堆叠技术解耦高压集成电路中保持电压和触发电压的电路设计架构,以提高ESD保护性能。

Knowledge type
工艺技术
First proposed or discovered
Proposer
Turkey Farm member
Creator
农场主
Last updated
2026-10-25 21:01:41
Login to save this node.

Sub-knowledge points

Decoupling Holding and Trigger VoltagesHigh-Voltage IC ESD Protections

Higher-order knowledge points

No connected node yet

Main parameters and performance indicators

Holding Voltage: The voltage level at which the protection device remains in the holding state.Trigger Voltage: The voltage level at which the protection device activates to discharge current.Stacking Architecture: A structural arrangement of devices to manage voltage distribution.

Open problems

No unresolved problem recorded yet

Related literature

ranked by community stars
Asynchronous Stacking Architecture Decoupling Holding and Trigger Voltages for High-Voltage ICs ESD ProtectionsOpen source

Related products and links

No item recorded yet

Creation and modification trail

1 records
automated knowledge publish农场主2026-10-25 21:01:42

Record title: Asynchronous Stacking Architecture.